Honestly, I just took a guess and tried it (the wextmclk variant) not really knowing what all people considered ‘external’ for MCLK. (e.g. external to the ADC or external to the transmitter, etc.) 😉 It worked on an otherwise unmodified 1.6 fab and that validated my board’s hardware so I immediately set about trying to figure out what was wrong with my firmware build instead.
(A search in the makefile only yielded two hits on ‘audio’, so I just took another guess at what the switch might be based on “ifeq ($(ENABLE_AUDIO),y)” and ended up with the “ENABLE_AUDIO=y” based on the format of the documented “DIY_AUDIO=y” option.)
I wasn’t able to find a reference manual for the 6613 with register descriptions, so I don’t know the specifics of functionality of REG_TX_CLK_CTRL0. Typically MCLK would just be the full master CODEC clock (so, I would expect it to be 24.576MHz on the 1862) and then SCLK would probably be like 512FS or whatever for a 48KHz sample rate), but since the ADC is generating it’s own MCLK from the crystal I wouldn’t expect it being necessary at all at the 6613 since it’s already receiving a fully framed sample clock frequency stream from the ADC. (If the 6613 could be configured as a clock master that’d make more sense to me because it could then supply 24.576MHz or 12.288MHz or whatever to the ADC as an external MCLK and you’d save the cost of the crystal and tank caps on the ADC side…)
(I confess I haven’t followed development of the OSSC though, so I don’t know the history on anything, I only started looking at it a couple weeks ago when I decided to build some up.)