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Reply To: MiST-Fpga with OSSC

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#16210

marqs
Participant

The digitizer chip has issues with non-interlace signals using odd-odd field signalling (identified by VSM=2). One solution is to hook the source to AV3 VGA input (doesn’t MiST already output VGA?) which has a bit different sync processing chain and doesn’t inhibit this issue (but has a few other bugs).